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dc.contributor.authorWelti, Tobias-
dc.contributor.authorMoser, Aaron-
dc.contributor.authorGelke, Hans-Joachim-
dc.date.accessioned2020-03-05T15:02:50Z-
dc.date.available2020-03-05T15:02:50Z-
dc.date.issued2020-
dc.identifier.urihttps://digitalcollection.zhaw.ch/handle/11475/19666-
dc.description.abstractDue to their hardware architecture, Field Programmable Gate Arrays (FPGAs) are optimally suited for the implementation of machine learning algorithms. So far, it is cumbersome to port a neural network (NN) to an FPGA. A frequently used solution is the implementation of NNs using the Open Compute Language (OpenCL) which can be converted to HDL code for use in the FPGA. While OpenCL supports the development of NN algorithms, it also adds unnecessary overhead to the FPGA netlist, limiting the performance of the FPGA. We have developed a framework for the conversion of fully connected, 1D- and 2D-convolutional NN layers to VHDL ode. The framework converts NN models that are trained in TensorFlow or Keras to a synthesizable VHDL code and creates a C model and testbench for verification. This enables nonlinear signal processing with NNs in real-time directly in the FPGA without the use of an embedded CPU.de_CH
dc.language.isoende_CH
dc.publisherWEKAde_CH
dc.rightsLicence according to publishing contractde_CH
dc.subjectArtificial Intelligencede_CH
dc.subjectConvolutional neural networkde_CH
dc.subjectNative FPGA implementationde_CH
dc.subjectLow latency inferencede_CH
dc.subjectTensorFlowde_CH
dc.subjectKerasde_CH
dc.subject.ddc006: Spezielle Computerverfahrende_CH
dc.titleFramework to port neural networks to FPGA, suitable for realtime signal processingde_CH
dc.typeKonferenz: Paperde_CH
dcterms.typeTextde_CH
zhaw.departementSchool of Engineeringde_CH
zhaw.organisationalunitInstitute of Embedded Systems (InES)de_CH
zhaw.conference.detailsEmbedded World Conference 2020, Nürnberg, 25.-27. Februar 2020de_CH
zhaw.funding.euNode_CH
zhaw.originated.zhawYesde_CH
zhaw.publication.statuspublishedVersionde_CH
zhaw.publication.reviewPeer review (Abstract)de_CH
zhaw.author.additionalNode_CH
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Welti, T., Moser, A., & Gelke, H.-J. (2020). Framework to port neural networks to FPGA, suitable for realtime signal processing. Embedded World Conference 2020, Nürnberg, 25.-27. Februar 2020.
Welti, T., Moser, A. and Gelke, H.-J. (2020) ‘Framework to port neural networks to FPGA, suitable for realtime signal processing’, in Embedded World Conference 2020, Nürnberg, 25.-27. Februar 2020. WEKA.
T. Welti, A. Moser, and H.-J. Gelke, “Framework to port neural networks to FPGA, suitable for realtime signal processing,” in Embedded World Conference 2020, Nürnberg, 25.-27. Februar 2020, 2020.
WELTI, Tobias, Aaron MOSER und Hans-Joachim GELKE, 2020. Framework to port neural networks to FPGA, suitable for realtime signal processing. In: Embedded World Conference 2020, Nürnberg, 25.-27. Februar 2020. Conference paper. WEKA. 2020
Welti, Tobias, Aaron Moser, and Hans-Joachim Gelke. 2020. “Framework to Port Neural Networks to FPGA, Suitable for Realtime Signal Processing.” Conference paper. In Embedded World Conference 2020, Nürnberg, 25.-27. Februar 2020. WEKA.
Welti, Tobias, et al. “Framework to Port Neural Networks to FPGA, Suitable for Realtime Signal Processing.” Embedded World Conference 2020, Nürnberg, 25.-27. Februar 2020, WEKA, 2020.


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