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https://doi.org/10.21256/zhaw-23966| Publication type: | Conference paper |
| Type of review: | Peer review (abstract) |
| Title: | Secure boot concept on the Zynq Ultrascale+ MPSoC |
| Authors: | Delafontaine, Thierry Rosenthal, Matthias |
| et. al: | No |
| DOI: | 10.21256/zhaw-23966 |
| Conference details: | Embedded World Conference 2021, online, 1.-5. März 2021 |
| Issue Date: | May-2021 |
| Publisher / Ed. Institution: | ZHAW Zürcher Hochschule für Angewandte Wissenschaften |
| Language: | English |
| Subjects: | HW + SW development; Operating system; FPGA |
| Subject (DDC): | 006: Special computer methods |
| Abstract: | The complexity of today's multiprocessor System-on-Chip (MPSoC) can lead to major security risks in embedded designs, as the available security functions are often not or insufficiently utilized.This presentation demonstrates a concept of a secure boot and runtime system on a Xilinx Zynq Ultrascale+ to prevent potential hacker attacks. The security concept is matched with dedicated on-chip security features like AES core, RSA core and hashing core. It also includes monitoring of environmental parameters such as voltage and temperature to detect tampering and prevent disclosure of data. In addition, secure key storage and various methods for minimizing key consumption are discussed. Finally, the talk covers the ARM TrustZone technology and the use of OP-TEE as a secure operating system. |
| URI: | https://digitalcollection.zhaw.ch/handle/11475/23966 |
| Fulltext version: | Submitted version |
| License (according to publishing contract): | Licence according to publishing contract |
| Departement: | School of Engineering |
| Organisational Unit: | Institute of Embedded Systems (InES) |
| Appears in collections: | Publikationen School of Engineering |
Files in This Item:
| File | Description | Size | Format | |
|---|---|---|---|---|
| 2021_Delafontaine-Rosenthal_Secure-boot_ewC2021.pdf | 540.04 kB | Adobe PDF |  View/Open |
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Delafontaine, T., & Rosenthal, M. (2021, May). Secure boot concept on the Zynq Ultrascale+ MPSoC. Embedded World Conference 2021, Online, 1.-5. März 2021. https://doi.org/10.21256/zhaw-23966
Delafontaine, T. and Rosenthal, M. (2021) ‘Secure boot concept on the Zynq Ultrascale+ MPSoC’, in Embedded World Conference 2021, online, 1.-5. März 2021. ZHAW Zürcher Hochschule für Angewandte Wissenschaften. Available at: https://doi.org/10.21256/zhaw-23966.
T. Delafontaine and M. Rosenthal, “Secure boot concept on the Zynq Ultrascale+ MPSoC,” in Embedded World Conference 2021, online, 1.-5. März 2021, May 2021. doi: 10.21256/zhaw-23966.
DELAFONTAINE, Thierry und Matthias ROSENTHAL, 2021. Secure boot concept on the Zynq Ultrascale+ MPSoC. In: Embedded World Conference 2021, online, 1.-5. März 2021. Conference paper. ZHAW Zürcher Hochschule für Angewandte Wissenschaften. Mai 2021
Delafontaine, Thierry, and Matthias Rosenthal. 2021. “Secure Boot Concept on the Zynq Ultrascale+ MPSoC.” Conference paper. In Embedded World Conference 2021, Online, 1.-5. März 2021. ZHAW Zürcher Hochschule für Angewandte Wissenschaften. https://doi.org/10.21256/zhaw-23966.
Delafontaine, Thierry, and Matthias Rosenthal. “Secure Boot Concept on the Zynq Ultrascale+ MPSoC.” Embedded World Conference 2021, Online, 1.-5. März 2021, ZHAW Zürcher Hochschule für Angewandte Wissenschaften, 2021, https://doi.org/10.21256/zhaw-23966.
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